He used to work for Netgem [0], and according to his French wikipedia page [1] he co-founded Amarisoft where he is listed on their about page [2]: Amarisoft We are delighted to bring some affordable tools and software to the 4G mobile community to unleash creativity and at the end expand communications among people. Accessible technology is the basement of possible success story. We at Amarisoft are working on helping all size of company or individuals being a player in mobile networks of now and future generation. We hope you'll enjoy the opportunity. [.] Fabrice Bellard Fabrice is a computer programmer who is best known as the creator of the FFmpeg and QEMU software projects. He studied at Ecole Polytechnique, specializing at Telecom Paris in 1996. Fabrice is an amazing person bringing creativity to the whole team. I understand that designing processors is fun, but I hold several things against RISC-V: - the assembler dst, src backward syntax (like intel); - the fact that this processor design is being aggressively pushed here (featured several times already); - the fact that the instruction set is non-orthogonal (32-bit fixed encoding makes the decoder simple, but creates the same load-store problem as on SPARC - hello non-existent, synthetic instructions!); - the fact that they could have extended the open source UltraSPARC T-series design, but decided to just re-invent the wheel all over again. How does 128-bit support justify starting from scratch, and not re-using what is already there and open sourced? The last point is their biggest sin, in my view. Staff, I brought this book near to the moving target of OS-9/68000. 3 Since OS-9/68000 does not use dynamic address translation, the module's address is. How was a terminal emulator program to know the code that would set each. There is already an open source processor design, and a good, solid design, and they just went ahead and invented their own anyway. All the lessons about reuse went out of the window. We're the only industry that I know of that keeps nuking itself and starting from scratch, throwing away all the work which had been done before. Oh, and I seriously dislike the instruction mnemonics. To the authors of RISC-V: couldn't you have made the mnemonics MC68000 compatible, or at least make them similar? To address a couple of these points: - Assembler syntax is a matter of personal preference. I also loved programming the 68K, writing OS-9/68k drivers back in 1990. However the vast majority of even kernel/embedded programmers rarely touch assembler these days. - SPARC & register windows. A very unfortunate design choice in hindsight. The RISC-V ISA developers have paid very close attention to existing designs, and other ISAs and microarchitectures are frequently referenced. Have a look at the discussions on the ISA-Dev mailing list: - RISC-V is trying to avoid patents, so they cannot necessarily reuse existing ISAs, even open ones. Register renaming is a better way to provide large numbers of hardware registers. Another aim of RISC-V is to provide an architecture which is both easy to implement at the low end, and can be scaled at the high end.
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March 2019
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